HYBRID SEMINAR IN 13-2-005 AND ZOOM
The upgrade to the high-luminosity LHC (HL-LHC) will yield approximately 200 inelastic proton-proton collisions per beam crossing at energies of up to 14 TeV. The ATLAS Liquid Argon (LAr) calorimeter is expected to gather 4,000 fb−1 of collision data during the operational lifetime of the HL-LHC to support the pursuit of physics inquiries into the Standard Model. The higher luminosity places increasingly stringent radiation-tolerance requirements and the need for seamless integration of on-detector readout electronics, in addition to better quantization performance to yield better physics results. This talk discusses the evolution of the LAr readout with a particular emphasis on the design of a full-custom analog-to-digital converter (ADC) for the 182,468 channels in the ATLAS LAr calorimeter as part of the HL-LHC phase-2 upgrade.
Each of the 8 channels in the prototype 65 nm CMOS ADC with 15-bit resolution and >68 dB signal-to-noise-and-distortion ratio (SNDR), or equivalently >11 effective number of bits (ENOB), consists of a Multiplying-DAC (MDAC) and a successive-approximation (SAR) ADC. A digital data processing unit (DDPU) calibrates and serially transmits the quantized data. Initial lab characterization of 18 chips shows a minimum SNDR of 69.5 dB at full-scale at about 5 MHz and a maximum power consumption of 1.17 W; differential non-linearity (DNL) measurements show no missing codes. Additional validation of the ADC is ongoing before approximately 70k chips can be mass-produced for the upgrade. The transistor-level design, system-level architecture, as well as the foreground calibration principle will be discussed in this talk.
- Columbia University, Nevis Labs
- Columbia University, Electrical Engineering Department
- University of Texas at Austin, Physics Department
- University of Texas at Austin, Electrical and Computer Engineering Department
Zoom details are also in the invitation email.
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