Machine learning and signal processing on the edge are poised to influence our everyday lives with devices that will learn and infer from data generated by smart sensors and other devices for the Internet of Things. The next leap towards ubiquitous electronics requires increased energy-efficiency of processors for specialized data-driven applications. I will present here how we realised an in-memory processor fabricated using a two-dimensional materials platform can potentially outperform its silicon counterparts in both standard and non-traditional Von Neumann architectures for artificial neural networks. The circuits are based on a flash memory array with a two-dimensional channel using wafer-scale MoS2. Simulations and experiments show that the device can be scaled down to sub-μm channel length without any significant impact on its memory performance. I will then present our latest work with large-scale integrated vector-matrix multiplier circuits based on 1024 MoS2 floating gate memories.
Friday
22 Nov/24
11:00
-
12:15
(Europe/Zurich)
Large-scale Integrated Circuits with 2D MoS2 for Neuromorphic Computing
Where:
40/S2-D01 at CERN